Results 11-18 of 18 (Search time: 0.0 seconds).
Issue Date | Title | Author(s) | Type |
---|---|---|---|
2008 | A full adder design using serially connected single-layer magnetic tunnel junction elements | 신형순; 이승준 | Article |
2004 | A novel sensing circuit for high speed synchronous magneto-resistive RAM | 신형순; 이승준 | Conference Paper |
2007 | The 3-bit gray counter based on magnetic-tunnel-junction elements | 신형순; 김낙명; 이승준 | Conference Paper |
2004 | A sensing circuit for MRAM based on 2MTJ-2T structure | 신형순; 이승준 | Article |
2007 | Magneto-logic device based on a single-layer magnetic tunnel junction | 신형순; 이승준 | Article |
2007 | Low-voltage-driven pentacene thin-film transistor with an organic-inorganic nanohybrid dielectric | 이승준 | Article |
2002 | Clock distribution scheme for high-speed DRAM | 이승준 | Article |
2005 | Charge-based analytical current model for asymmetric Double-Gate MOSFETs | 지윤규; 신형순; 이승준 | Article; Proceedings Paper |