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A 2.5Gb/s ESD-protected dual-channel optical transceiver array

Title
A 2.5Gb/s ESD-protected dual-channel optical transceiver array
Authors
Han J.Choi B.Park K.Oh W.S.Park S.M.
Ewha Authors
박성민
SCOPUS Author ID
박성민scopus
Issue Date
2007
Journal Title
2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Indexed
SCOPUS scopus
Abstract
This paper describes the design of a dual-channel optical transceiver array realized in a standard 0.18μm CMOS technology for the applications of high-speed digital interface. The transmitter drives a 2-channel VCSEL array at 2.5Gb/s, equipped with the APC (5-15mA) and AMC (4-20mApp) loops for constant and reliable optical power outputs. Meanwhile, the receiver exploits the common-gate transimpedance amplifier, demonstrating 87dBΩ transimpedance gain, 1.4GHz bandwidth for 2pF input parasitic capacitance, -18dBm sensitivity for 10-12 BER, and less than -20dB crosstalk between TX and RX within the bandwidth. The whole 2-channel transceiver array chip dissipates 500mW. ©2007 IEEE.
DOI
10.1109/ASSCC.2007.4425754
ISBN
1424413605; 9781424413607
Appears in Collections:
엘텍공과대학 > 전자공학과 > Journal papers
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