Improvement of Josephson junction uniformity via early-stage junction formation for scalable qubit production

Abstract

To maximize the yield of scalable superconducting quantum processors, we introduce a fabrication strategy that prioritizes the formation of Josephson junctions (JJs) before the shunting capacitors. The junction-first approach minimizes the impact of accumulated process-induced surface modifications on the JJ interface. We show through wafer-scale statistical measurements that this sequence substantially reduces fluctuations in junction resistance across different wafers. Surface analysis via transmission electron microscopy and atomic force microscopy identifies that preceding lithography and etching steps in conventional workflows damage the substrate surface, leading to non-uniform junction morphology. The compatibility of this process with high-performance qubit operation is demonstrated through the fabrication of an eight-qubit quantum processing unit. The resulting coherence times remain sufficient for fully functional qubit operation, confirming that that the junction-first process significantly enhances junction reproducibility while maintaining viable qubit performance, offering a scalable pathway for next-generation quantum hardware.