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Spike-based Q-learning in a non-von Neumann architecture

Title
Spike-based Q-learning in a non-von Neumann architecture
Authors
Shin D.; Jo H.; Jang H.; Jeong Y.H.; Jeong Y.; Kwak J.Y.; Park J.; Lee S.; Kim I.; Park J.-K.; Park S.; Jang H.J.; Lee H.-M.; Kim J.
Ewha Authors
곽준영
SCOPUS Author ID
곽준영scopus
Issue Date
2026
Journal Title
Frontiers in Neuroscience
ISSN
1662-4548JCR Link
Citation
Frontiers in Neuroscience vol. 20
Keywords
cart-pole; neuromorphic architecture; non-von Neumann architecture; Q-learning; reinforcement learning; SNN
Indexed
SCIE; SCOPUS WOS scopus
Document Type
Article
Abstract
Non-von Neumann architectures overcome the memory-compute separation of von Neumann systems by distributing computation and memory locally, thereby reducing data-transfer bottlenecks and power consumption. These features are particularly advantageous for reinforcement learning (RL) workloads that rely on frequent value-function updates across large state-action spaces. When combined with event-driven spiking neural networks (SNNs), non-von Neumann architectures can further improve overall computational efficiency by leveraging the sparse nature of spike-based processing. In this study, we propose a hardware-feasible SNN-based non-von Neumann architecture that performs Q-learning, one of the most widely known reinforcement learning algorithms. The proposed architecture maps states and actions to individual neurons using one-hot encoding and locally stores each state–action pair's Q-value in the corresponding synapse. To enable each synapse to update its local Q-value based on the next state maximum Q stored in other synapses, a neuron group connected through a lateral inhibition structure is employed to produce the maximum Q, which is then globally transmitted to all synapses. A delay circuit is also added to align the next-state and current-state values to ensure temporally consistent updates. Each synapse locally generates a learning selection signal and combines it with the globally transmitted signals to update only the target synapse. The proposed architecture was validated through simulations on the Cart-pole benchmark, showing stable learning performance under low-bit precision and achieving comparable accuracy to software-based Q-learning with sufficient bit precision. Copyright © 2026 Shin, Jo, Jang, Jeong, Jeong, Kwak, Park, Lee, Kim, Park, Park, Jang, Lee and Kim.
DOI
10.3389/fnins.2026.1738140
Appears in Collections:
ETC > ETC
Files in This Item:
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