Mem-Transistor-Based Gaussian Error-Generating Hardware for Post-Quantum Cryptography Applications

Abstract

Quantum computing can potentially hack the information encrypted by traditional cryptographic systems, leading to the development of post-quantum cryptography (PQC) to counteract this threat. The key principle behind PQC is the "learning with errors" problem, where intentional errors make encrypted information unpredictable. Intentional errors refer to Gaussian distributed data. However, implementing Gaussian distributed errors is challenging owing to computational and memory overhead. Therefore, this study proposes a Gaussian error sampler that employs the intrinsic Gaussian properties of nanometer-scale semiconductor devices. The proposed Gaussian error sampler significantly reduces computational and memory overhead. This work comprehensively evaluates the effectiveness of the proposed device by conducting statistical normality tests and generating quantile-quantile plots. The optimal programming voltage is identified to be -5.25 V, and the experimental results confirmed the Gaussian distribution of error data generated by the proposed module, aligning closely with software-generated Gaussian distributions and distinct from uniform random distributions. The demonstration of a Gaussian error sampler system that leverages the intrinsic stochastic characteristics of mem-transistor semiconductor devices. The demonstrated Gaussian error sampler significantly reduces computational and memory overhead compared to existing techniques. The Gaussian error sampler is the key principle for implementing post-quantum cryptography. image