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Low Noise CMOS Temperature Sensor with On-Chip Digital Calibration
- Low Noise CMOS Temperature Sensor with On-Chip Digital Calibration
- Park, Yunjong; Kim, Hyungseup; Ko, Youngwoon; Mun, Yeongjin; Lee, Sangmin; Kim, Ji-Hoon; Ko, Hyoungho
- Ewha Authors
- SCOPUS Author ID
- Issue Date
- Journal Title
- SENSORS AND MATERIALS
- SENSORS AND MATERIALS vol. 29, no. 7, pp. 1025 - 1030
- temperature sensor; bandgap reference; on-chip calibration
- MYU, SCIENTIFIC PUBLISHING DIVISION
- SCIE; SCOPUS
- Document Type
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- In this paper, we present a low-noise CMOS temperature sensor with an on-chip digital calibration circuit. The low-voltage bandgap reference circuit is designed to generate current proportional to absolute temperature (PTAT) using a parasitic NPN bipolar junction transistor (BIT). To adjust the output offset and gain of the temperature sensing core, an additional calibration stage based on the differential to the single amplifier (D2S) using a differential difference amplifier (DDA) is designed. A calibration circuit with low power and small size can be implemented using the D2S. Also because of the D2S, the conventional multistage offset and gain calibration circuits can be reduced to a single-stage circuit. The analog output is converted to a digital output using a 12-bit successive approximation register (SAR) analog-to-digital converter (ADC). A coarse calibration with 5-bit resolution is performed in the analog domain using a DDA-based calibration circuit, and a fine calibration using a 16-bit arithmetic engine is performed in the digital domain. The temperature sensor IC is implemented using a CMOS 0.18 mu m process with an active area of 0.2216 mm(2). The power consumption is 48.6 mu W with a 1.8 V supply. The IC can measure temperatures from 10 to 60 degrees C. The measured gain is 28.36 mV/degrees C. The input-referred temperature noise is measured to be 0.26 degrees C-RMS with a 200 Hz bandwidth.
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