Performance evaluation of an alternative IP lookup scheme for implementing high-speed routers

Abstract

The most important function of a router is to perform IP lookup that determines the output ports of incoming IP packets by their destination addresses. Hence, IP lookup is one of the main issues in implementing high-speed routers. The IP lookup algorithm implemented in IQ2200 Chipset with two-level table architecture can efficiently use memory. However, it wastes processor resource for full re-construction of the forwarding tables whenever every route insertion/deletion is requested. In order to improve the utilization of processor resource, we propose an IP lookup algorithm with three-level table architecture for high-speed routers. We evaluate the performance of the proposed algorithm in terms of the memory size required for storing lookup information and the number of memory access in constructing forwarding tables. Being compared with the IQ2200 scheme, the proposed scheme can reduce the number of memory access up to 99% even though it needs about 16% more memory.