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A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement
- Title
- A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement
- Authors
- Sun G.; Joo Y.; Chen Y.; Xie Y.
- Ewha Authors
- 주용수
- SCOPUS Author ID
- 주용수
- Issue Date
- 2014
- Journal Title
- Emerging Memory Technologies: Design, Architecture, and Applications
- Citation
- Emerging Memory Technologies: Design, Architecture, and Applications vol. 9781441995513, pp. 51 - 77
- Publisher
- Springer New York
- Indexed
- SCOPUS
- Document Type
- Book Chapter
- Abstract
- In recent years, many systems have employed NAND flash memory as storage devices because of its advantages of high I/O performance, increasing capacity, and falling cost. On the other hand, the performance of NAND flash memory is limited by its erase-before-write requirement. Log-based structures have been used to alleviate this problem by writing updated data to the clean space. Log-based methods, however, cannot completely overcome the inherent limitation of NAND flash memory. It cannot avoid excessive erase operations when there are frequent updates, which quickly consume free pages, especially when some data are updated repeatedly. In this paper, we propose a hybrid architecture for the NAND flash memory storage, of which the log region is implemented using phase change random access memory (PCRAM). Compared to traditional log-based architectures, it has the following advantages: (1) the PCRAM log region allows in-place updating and byte-granularity access so that it significantly improves the usage efficiency of log pages by eliminating out-of-date log records; (2) it greatly reduces the traffic of reading from the NAND flash memory storage since the size of logs loaded for the read operation is decreased; (3) the energy consumption of the storage system is reduced as the overhead of writing and reading log data is decreased with the PCRAM log region; (4) the lifetime of NAND flash memory is increased because the number of erase operations are reduced. To facilitate the PCRAM log region, we propose several management policies. The simulation results show that our proposed methods can substantially improve the performance, energy consumption, and lifetime of the NAND flash memory storage. © 2014 Springer Science+Business Media New York. All rights are reserved.
- DOI
- 10.1007/978-1-4419-9551-3_3
- ISBN
- 9781441995513
1441995501
9781441995506
- Appears in Collections:
- 연구기관 > 임베디드소프트웨어연구센터 > Journal papers
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