IEEE Transactions on Electron Devices vol. 49, no. 4, pp. 605 - 612
SCI; SCIE; SCOPUS
The effects of shallow trench isolation (STI) on silicon-on-insulator (SOI) devices are investigated for various device sizes with three different gate shapes. Both NMOSFETs and PMOSFETs with the channel region butted to the STI show the reduction of mobility (NMOSFETs and PMOSFETs) and the increase of low-frequency noise as the channel width is reduced. In comparison, the devices without the STI-butted channel region show much less variation in mobility for various channel width. The degradation of MOSFETs' yield in SOI MOSFETs with the STI is found to be dependent on the device width since the contribution of the interface roughness (or damage) between the STI and the channel formed during the dry etch process becomes significant with the decrease of channel width and the increase of channel length. From the charge-pumping results, the interface state (N it) generated by the STI process was identified as the cause of the anomalous degradation.