Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 신형순 | * |
dc.contributor.author | 박지선 | * |
dc.contributor.author | 조성재 | * |
dc.date.accessioned | 2024-02-08T16:30:05Z | - |
dc.date.available | 2024-02-08T16:30:05Z | - |
dc.date.issued | 2023 | * |
dc.identifier.issn | 1751-858X | * |
dc.identifier.issn | 1751-8598 | * |
dc.identifier.other | OAK-34549 | * |
dc.identifier.uri | https://dspace.ewha.ac.kr/handle/2015.oak/267117 | - |
dc.description.abstract | Neuron circuits are the fundamental building blocks in the modern neuromorphic system. Designing compact and low-power neuron circuits can significantly improve the overall area and energy efficiencies of a neuromorphic chip architecture. Here, practical neuron circuits must overcome the variations arising from nonideal behaviors of synaptic devices, such as stuck-at-fault and conductance deviation. In this study, a compact leaky integrate-and-fire neuron circuit has been designed, with resilience to synaptic device state variations, for hardware implementation of spiking neural networks (SNNs). The proposed neuron circuit is simulated on the 0.35-mu m Si complementary metal-oxide-semiconductor technology node by a series of circuit simulations based on HSPICE. The proposed circuit occupies a reduced area and exhibits low power consumption (14.7 mu W per spike). Furthermore, the optimized circuit design results in a high degree of tolerance toward input-current variations arising from conductance-state variations in the synapse array. Hence, the proposed neuron circuit would be capable of substantially improving the area efficiency and reliability in the realization of the hardware-oriented SNN architectures. | * |
dc.language | English | * |
dc.publisher | WILEY-HINDAWI | * |
dc.title | An Area-Efficient Integrate-and-Fire Neuron Circuit with Enhanced Robustness against Synapse Variability in Hardware Neural Network | * |
dc.type | Article | * |
dc.relation.volume | 2023 | * |
dc.relation.index | SCIE | * |
dc.relation.index | SCOPUS | * |
dc.relation.journaltitle | IET CIRCUITS DEVICES & SYSTEMS | * |
dc.identifier.doi | 10.1049/2023/1052063 | * |
dc.identifier.wosid | WOS:001137288900001 | * |
dc.author.google | Shah, Arati Kumari | * |
dc.author.google | Udaya Mohanan, Kannan | * |
dc.author.google | Park, Jisun | * |
dc.author.google | Shin, Hyungsoon | * |
dc.author.google | Cho, Eou-Sik | * |
dc.author.google | Cho, Seongjae | * |
dc.contributor.scopusid | 신형순(7404012125) | * |
dc.contributor.scopusid | 박지선(56095689300) | * |
dc.contributor.scopusid | 조성재(13607031400) | * |
dc.date.modifydate | 20240322125227 | * |