View : 86 Download: 0

A Band-Engineered One-Transistor DRAM With Improved Data Retention and Power Efficiency

Title
A Band-Engineered One-Transistor DRAM With Improved Data Retention and Power Efficiency
Authors
Yu, EunseonCho, SeongjaeShin, HyungsoonPark, Byung-Gook
Ewha Authors
신형순
SCOPUS Author ID
신형순scopus
Issue Date
2019
Journal Title
IEEE ELECTRON DEVICE LETTERS
ISSN
0741-3106JCR Link

1558-0563JCR Link
Citation
IEEE ELECTRON DEVICE LETTERS vol. 40, no. 4, pp. 562 - 565
Keywords
One-transistor DRAMSiGe quantum wellband-to-band tunnelingDRAM retentionlow-power operation
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Indexed
SCI; SCIE; SCOPUS WOS scopus
Document Type
Article
Abstract
In this letter, a one-transistor (1T) dynamic random-access memory (DRAM) with SiGe quantum well (QW) is proposed, and its performance is validated through the technology computer-aided design (TCAD) simulation. At the write operation, band-to-band tunneling is used and 1 V or lower programming voltage is realized by inserting the SiGe QW beside the drain. This QW also functions as the storage node, which enhances not only the current sensing margin but also the retention time (tau(ret)) compared with those of all-Si device. At an extremely scaled cell size and sub-10-ns write/erase operations, the proposed device shows 0.2-s-long tau(ret) and current ratio > 10(4). It has been verified that a single cycle of 1T DRAM operations consumes only 93.8 fJ.
DOI
10.1109/LED.2019.2902334
Appears in Collections:
엘텍공과대학 > 전자공학과 > Journal papers
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE