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dc.contributor.author박성민*
dc.date.accessioned2016-08-28T11:08:23Z-
dc.date.available2016-08-28T11:08:23Z-
dc.date.issued2005*
dc.identifier.issn1041-1135*
dc.identifier.otherOAK-12774*
dc.identifier.urihttps://dspace.ewha.ac.kr/handle/2015.oak/228848-
dc.description.abstractA 10-Gb/s optical receiver array with low interchannel crosstalk is realized by exploiting an InGaP-GaAs heterojunction bipolar transistor technology in a three-dimensional multilayer low-temperature cofiring ceramics (LTCC) module. Neutralization feedback circuit with LTCC embedded bus structure is proposed to suppress significant high-frequency crosstalk from on-chip bus and intermetallic capacitance. This module demonstrates 5 dB better suppressed-coupling than a conventional on-chip bus module with 0.8-dB power penalty. © 2005 IEEE.*
dc.languageEnglish*
dc.titleLow-crosstalk 10-Gb/s flip-chip array module for parallel optical interconnects*
dc.typeArticle*
dc.relation.issue7*
dc.relation.volume17*
dc.relation.indexSCI*
dc.relation.indexSCIE*
dc.relation.indexSCOPUS*
dc.relation.startpage1516*
dc.relation.lastpage1518*
dc.relation.journaltitleIEEE Photonics Technology Letters*
dc.identifier.doi10.1109/LPT.2005.848562*
dc.identifier.wosidWOS:000230052900052*
dc.identifier.scopusid2-s2.0-23844536188*
dc.author.googlePark S.H.*
dc.author.googlePark S.M.*
dc.author.googlePark H.-H.*
dc.author.googlePark C.S.*
dc.contributor.scopusid박성민(7501832231)*
dc.date.modifydate20240322125443*
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공과대학 > 전자전기공학전공 > Journal papers
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