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A hybrid PRAM and STT-RAM cache architecture for extending the lifetime of PRAM caches

Title
A hybrid PRAM and STT-RAM cache architecture for extending the lifetime of PRAM caches
Authors
Joo Y.Park S.
Ewha Authors
박상수주용수
SCOPUS Author ID
박상수scopus; 주용수scopus
Issue Date
2013
Journal Title
IEEE Computer Architecture Letters
ISSN
1556-6056JCR Link
Citation
vol. 12, no. 2, pp. 55 - 58
Indexed
SCIE; SCOPUS WOS scopus
Abstract
Cache memories; Design Styles; Hardware; Memory Structures; Redundant design; Reliability; Testing and Fault-Tolerance
DOI
10.1109/L-CA.2012.24
Appears in Collections:
엘텍공과대학 > 컴퓨터공학과 > Journal papers
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