View : 699 Download: 0

Full metadata record

DC Field Value Language
dc.contributor.author신형순*
dc.date.accessioned2016-08-28T11:08:34Z-
dc.date.available2016-08-28T11:08:34Z-
dc.date.issued2004*
dc.identifier.issn0374-4884*
dc.identifier.otherOAK-1804*
dc.identifier.urihttps://dspace.ewha.ac.kr/handle/2015.oak/219371-
dc.description.abstractThe short channel effects (SCE) of bulk MOSFETs with super-steep retrograded channels (SSR), fully-depleted SOI, and double-gate MOSFETs have been analyzed using device simulations and a scaling-length (λ) analysis. It is found that the minimum channel length should be larger than 5λ and that the depletion thickness of the SSR should be around 30 nm in order to be applicable to 70-nm CMOS technology. A high-kappa dielectric shows a limitation in scaling due to the drain-field penetration through the dielectric unless the equivalent SiO 2 thickness is very thin. The SSR gives the smallest SCE of the three structures considered.*
dc.languageEnglish*
dc.titleEvanescent-Mode Analysis of Short-Channel Effects in MOSFETs*
dc.typeConference Paper*
dc.relation.issue1*
dc.relation.volume44*
dc.relation.indexSCI*
dc.relation.indexSCIE*
dc.relation.indexSCOPUS*
dc.relation.indexKCI*
dc.relation.startpage50*
dc.relation.lastpage55*
dc.relation.journaltitleJournal of the Korean Physical Society*
dc.identifier.wosidWOS:000188198100012*
dc.identifier.scopusid2-s2.0-0842307487*
dc.author.googleLee J.*
dc.author.googleShin H.*
dc.contributor.scopusid신형순(7404012125)*
dc.date.modifydate20240322125227*
Appears in Collections:
공과대학 > 전자전기공학전공 > Journal papers
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

BROWSE