Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 신형순 | * |
dc.date.accessioned | 2016-08-28T11:08:09Z | - |
dc.date.available | 2016-08-28T11:08:09Z | - |
dc.date.issued | 2002 | * |
dc.identifier.issn | 0374-4884 | * |
dc.identifier.other | OAK-1270 | * |
dc.identifier.uri | https://dspace.ewha.ac.kr/handle/2015.oak/219108 | - |
dc.description.abstract | For the simulation of the architecture for a magnetoresistive random access memory (MRAM) based on GMR (giant magnetoresistance) and a MTJ (magnetic tunnel junction) cell having a hysteretic characteristics, a macro model showing this hysteresis is required. Also, a new sense amplifier is needed for the MRAM because the cell is destroyed at high voltages. Thus, this work presents a macro model and a sensing circuit for a MRAM. The macro model is realized by using a six-terminal subcircuit, which emulates the hysteretic nature of MRAM cell, and read/write simulations are possible. A current-source bit-line-clamped sense amplifier maintains a low voltage on the bit line during the full VDD sensing, so it is suitable for sensing the MRAM cell. | * |
dc.language | English | * |
dc.title | Macro model and sense amplifier for a MRAM | * |
dc.type | Conference Paper | * |
dc.relation.issue | 6 | * |
dc.relation.volume | 41 | * |
dc.relation.index | SCI | * |
dc.relation.index | SCIE | * |
dc.relation.index | SCOPUS | * |
dc.relation.index | KCI | * |
dc.relation.startpage | 896 | * |
dc.relation.lastpage | 901 | * |
dc.relation.journaltitle | Journal of the Korean Physical Society | * |
dc.identifier.wosid | WOS:000179871300014 | * |
dc.identifier.scopusid | 2-s2.0-0036940189 | * |
dc.author.google | Kim J.-H. | * |
dc.author.google | Lee J.-W. | * |
dc.author.google | Lee S.-J. | * |
dc.author.google | Shin H. | * |
dc.contributor.scopusid | 신형순(7404012125) | * |
dc.date.modifydate | 20240322125227 | * |