https://dspace.ewha.ac.kr/handle/2015.oak/171065 2026-04-10T08:58:31Z https://dspace.ewha.ac.kr/handle/2015.oak/275114 Title: Suppressing the Capacitive Coupling by Adjusting the Precharge Biasing Scheme in a Two-Transistor Dynamic Random-Access Memory Operation Ewha Authors: 조성재 Abstract: In this study, the impact of capacitive coupling (CC) caused by the parasitic capacitance components of metal-oxide semiconductor field effect transistors (MOSFETs) on the data stored in a two-transistor dynamic random-access memory (2T DRAM), is investigated, and a method to suppress CC is proposed. Recently, processing-in-memory (PIM) has been getting increasing popularity as one of the emerging technologies for future computing with a focus on data-centric operations due to increasing applications which deal with large amounts of data. 2T DRAM has advantages at high-speed inference operations, cell scalability with truncation of the bulky capacitor, and full Si processing-capability, which makes the 2T DRAM PIM more favorable in chip implementation. However, the 2T DRAM cell has a weakness in that it is highly susceptible to coupling, because the storage node (SN), where data is stored, exists between the two transistors at floating state. This work investigates the cause of the CC and explains how to the precharge voltage is used to reduce the effect of CC in 2T DRAM. Furthermore, the disturbance based on the data stored in each cell of a 32 × 32 array is analyzed to determine its impact on read operations. The overall circuit simulations are based on the 65-nm standard process and the effects of parameters in its model library are examined. © 2013 IEEE. 2026-01-01T00:00:00Z https://dspace.ewha.ac.kr/handle/2015.oak/274967 Title: Future object localization using multi-modal ego-centric video Ewha Authors: 강제원 Abstract: Future object localization (FOL) seeks to predict the future locations of objects using information from past and present video frames. Ego-centric videos from vehicle-mounted cameras serve as a key source. However, these videos are constrained by a limited field of view and susceptibility to external conditions. To address these challenges, this paper presents a novel FOL approach that combines ego-centric video data with point cloud data, enhancing both robustness and accuracy. The proposed model is based on a deep neural network that prioritizes front-camera ego-centric videos, exploiting their rich visual cues. By integrating point cloud data, the system improves three-dimensional (3D) object localization. Furthermore, the paper introduces a novel method for ego-motion prediction. The ego-motion prediction network employs multi-modal sensors to comprehensively capture physical displacement in both 2D and 3D spaces, effectively handling occlusions and the limited perspective inherent in ego-centric videos. Experimental results indicate that the proposed FOL system with ego-motion prediction (MS-FOLe) outperforms existing methods on large-scale open datasets for intelligent driving. © 2025 2026-01-01T00:00:00Z https://dspace.ewha.ac.kr/handle/2015.oak/274920 Title: Task-Based Quantization for Channel Estimation in RIS Empowered mmWave Systems Ewha Authors: 이형택 Abstract: In this paper, we investigate channel estimation for reconfigurable intelligent surface (RIS) empowered millimeter-wave (mmWave) multi-user single-input multiple-output communication systems using low-resolution quantization. Due to the high cost and power consumption of analog-to-digital converters (ADCs) in large antenna arrays and for wide signal bandwidths, designing mmWave systems with low-resolution ADCs is beneficial. To tackle this issue, we propose a channel estimation design using task-based quantization that considers the underlying hybrid analog and digital architecture in order to improve the system performance under finite bit-resolution constraints. Our goal is to accomplish a channel estimation task that minimizes the mean squared error distortion between the true and estimated channel. We develop two types of channel estimators: a cascaded channel estimator for an RIS with purely passive elements, and an estimator for the separate RIS-related channels that leverages additional information from a few semi-passive elements at the RIS capable of processing the received signals with radio frequency chains. Numerical results demonstrate that the proposed channel estimation designs exploiting task-based quantization outperform purely digital methods and can effectively approach the performance of a system with unlimited resolution ADCs. Furthermore, the proposed channel estimators are shown to be superior to baselines with small training overhead. © 1972-2012 IEEE. 2026-01-01T00:00:00Z https://dspace.ewha.ac.kr/handle/2015.oak/274611 Title: Device-Circuit Cooperative Design and Assessment of Scaled Bulk-Si DTMOS for Embedded Low-Operating-Power Applications Ewha Authors: 조성재 Abstract: Low-power (LP) device design is a dominant direction in modern electronics, as reflected in recent semiconductor technology roadmaps. The dynamic-threshold metal-oxide-semiconductor field-effect transistor (DTMOS), which dynamically modulates threshold voltage by tying the gate and the body, offers inherently low drive voltage. While DTMOS has been widely studied on silicon-on-insulator (SOI) platforms, its extension to scaled bulk-Si technology remains largely unexplored. In this work, we provide the first comprehensive investigation of bulk-Si DTMOS physics and operation. Using calibrated technology computer-aided design (TCAD) and circuit simulations, we show that bulk-Si DTMOS not only suppresses short-channel effects (SCEs) more effectively than conventional bulk MOSFETs, but also delivers improved subthreshold swing and enhanced on/off ratios as scaling intensifies where conventional devices suffer from severe leakage. Furthermore, we introduce a body-biasing scheme with a limiting transistor that decouples gate and body at high V-GS, enabling strong on-state performances without reliability degradation. These results establish bulk-Si DTMOS as a scalable and cost-effective candidate bridging low-power and high-performance (HP) CMOS applications. 2025-01-01T00:00:00Z