| 1998 | Channel length independent subthreshold characteristics in submicron MOSFET's | 신형순 | Article |
| 2020 | Charge Based Current-Voltage Model for the Silicon on Insulator Junctionless Field-Effect Transistor | 신형순; 박지선 | Article |
| 2005 | Charge-based analytical current model for asymmetric Double-Gate MOSFETs | 지윤규; 신형순; 이승준 | Article; Proceedings Paper |
| 2021 | Circuit Implementation of Multibit-generating Memristive Physical Unclonable Function | 최서연 | Master's Thesis |
| 2021 | Circuit Optimization Method to Reduce Disturbances in Poly-Si 1T-DRAM | 신형순; 박지선 | Article |
| 2013 | Circuit-level model of phase-locked spin-torque oscillators | 신형순; 이승준 | Conference Paper |
| 2018 | Clock Synchronous Multilayer Neuromorphic Hardware System and Hardware Optimized Guide Training Algorithm | 조수민 | Master's Thesis |
| 2023 | Deep Neural Networks for Determining Subgap States of Oxide Thin-Film Transistors | 신형순; 박지선 | Article |
| 2023 | Dependency of Spiking Behaviors of an Integrate-and-fire Neuron Circuit on Shunt Capacitor | 신형순; 조성재 | Article |
| 2009 | Design of logic module based on magnetic-tunnel-junction elements for nonvolatile field-programmable gate array | 신형순; 이승준 | Article |
| 2009 | Design of Magneto-logic based on Magnetic-Tunnel-Junction Elements and Verification using Emulation Cell | 이현주 | Master's Thesis |
| 2008 | Design of reconfigurable logic circuits based on single-layer magnetic-tunnel-junction elements | 신형순; 이승준 | Article |
| 2005 | Design of Synchronous MRAM Circuits for Local-Field-Switching MTJ | 배지혜 | Master's Thesis |
| 2003 | e-learning 사이트의 학습효과 증진을 위한 interface 사용성 연구 | 이지영 | Master's Thesis |
| 2020 | Effect of Initial Synaptic State on Pattern Classification Accuracy of 3D Vertical Resistive Random Access Memory (VRRAM) Synapses | 신형순; 선우경 | Article |
| 2002 | Effects of shallow trench isolation on silicon-on-insulator devices for mixed signal processing | 신형순 | Conference Paper |
| 2005 | Efficient frequency-domain simulation technique for short-channel MOSFET | 신형순 | Article |
| 2013 | Erratum: Circuit-level model of phase-locked spin-torque oscillators (Japanese Journal of Applied Physics (2013) 52 04CM08) | 신형순; 이승준 | Erratum |
| 2004 | Evanescent-Mode Analysis of Short-Channel Effects in MOSFETs | 신형순 | Conference Paper |
| 2019 | Fabrication and Characterization of a Thin-Body Poly-Si 1T DRAM With Charge-Trap Effect | 신형순; 선우경 | Article |
| 2016 | Guideline model for the bias-scheme-dependent power consumption of a resistive random access memory crossbar array | 신형순 | Article |
| 2003 | High cell-efficiency synchronous MRAM adopting unified bit-line cache | 신형순 | Article |
| 2019 | Implementation of multi-layer neural network system for neuromorphic hardware architecture | 신형순; 선우경; 이정원 | Conference Paper |
| 2022 | Implementation of Non-Invasive Physical Unclonable Function Based on a Memristor Crossbar Array | 김다영 | Master's Thesis |
| 2009 | Improved explicit current-voltage model for long-channel undoped surrounding-gate metal oxide semiconductor field effect transistor | 신형순 | Article |
| 2010 | Independent-Gate-Mode Double-Gate MOSFET를 이용한 RF Receiver 설계 | 정나래 | Master's Thesis |
| 2000 | Influence of trench-oxide depth on junction-size dependence of α-particle-induced charge collection | 신형순 | Article |
| 2002 | Investigation of noise characteristics of pn diodes by using a device simulator | 신형순 | Conference Paper |
| 2015 | Investigation of power dissipation for ReRAM in crossbar array architecture | 신형순 | Conference Paper |
| 2001 | Low-frequency noise degradation caused by STI interface effects in SOI-MOSFETs | 신형순 | Article |
