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REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing
- Title
- REACT: Scalable and High-Performance Regular Expression Pattern Matching Accelerator for In-Storage Processing
- Authors
- Jeong, Won Seob; Lee, Changmin; Kim, Keunsoo; Yoon, Myung Kuk; Jeon, Won; Jung, Myoungsoo; Ro, Won Woo
- Ewha Authors
- 윤명국
- SCOPUS Author ID
- 윤명국
- Issue Date
- 2020
- Journal Title
- IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
- ISSN
- 1045-9219
1558-2183
- Citation
- IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS vol. 31, no. 5, pp. 1137 - 1151
- Keywords
- In-storage processing (ISP); regular expression matching; accelerator; solid-state drive
- Publisher
- IEEE COMPUTER SOC
- Indexed
- SCIE; SCOPUS
- Document Type
- Article
- Abstract
- This article proposes REACT, a regular expression matching accelerator, which can be embedded in a modern Solid-State Drive (SSD) and a novel data access scheduling algorithm for high matching throughput. Specifically, REACT, including our data access scheduling algorithm, increases the utilization of SSD and the degree of internal memory parallelism for pattern matching processes. While the low-level flash exhibits long latency, modern SSDs in practice achieve high I/O performance by utilizing the massive internal parallelism at the system-level. However, exploiting the parallelism is limited for pattern matching since the sub-blocks, which constitute an input data and can be placed in multiple flash pages, should be tested in a sequence to process the input correctly. This limitation can induce low utilization of the accelerator. To address this challenge, the proposed REACT simultaneously processes multiple input streams with a parallel processing architecture to maximize matching throughput by hiding the long and irregular latency. The scheduling algorithm finds a data stream which requires a sub-block in closest time and prioritizes the access request to reduce the data stall of REACT. REACT achieves maximum 22.6 percent of matching throughput improvement on a 16-channel high-performance SSD compared to the accelerator without the proposed scheduling algorithm.
- DOI
- 10.1109/TPDS.2019.2953646
- Appears in Collections:
- 인공지능대학 > 컴퓨터공학과 > Journal papers
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