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Vectored-bloom filter implemented on FPGA for IP address lookup

Title
Vectored-bloom filter implemented on FPGA for IP address lookup
Authors
Byun H.Li Q.Lim H.
Ewha Authors
임혜숙
SCOPUS Author ID
임혜숙scopus
Issue Date
2019
Journal Title
ICEIC 2019 - International Conference on Electronics, Information, and Communication
Citation
ICEIC 2019 - International Conference on Electronics, Information, and Communication
Keywords
FPGAHardware acceleratorIP address lookupVectored-Bloom filter
Publisher
Institute of Electrical and Electronics Engineers Inc.
Indexed
SCOPUS scopus
Document Type
Conference Paper
Abstract
This paper presents an IP address lookup architecture constructed with a vectored-Bloom filter (VBF) to perform the longest prefix matching. The VBF is an efficient structure to obtain the output port of each input IP address without accessing an off-chip memory. This paper demonstrates that the proposed IP address lookup architecture parallelly implemented on an FPGA can achieve the high performance in terms of the search speed and the throughput. © 2019 Institute of Electronics and Information Engineers (IEIE).
DOI
10.23919/ELINFOCOM.2019.8706399
ISBN
9788995004449
Appears in Collections:
공과대학 > 전자전기공학전공 > Journal papers
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