Efficient memory page management for NVDIMM-based big data processing environments

Abstract

Due to the recent computing paradigm shift from desktop to cloud environments, NVDIMM-based memory architectures for big data processing are catching considerable interest. In this paper, we present an efficient page management scheme for large-scale NVDIMM memory. The proposed architecture carefully determines the page size of a large-scale memory system such that TLB hit ratio is improved significantly without increasing the page fault ratio, thereby allowing big-data processing efficiently, which was not easy in conventional DRAM-based memory systems. The main contribution of this paper is that it proposes a new paradigm of "NVDIMM-based large memory architecture" instead of conventional "DRAM-based memory system" and presents efficient management techniques for that architecture by considering both TLB performances and page fault rates. © 2017 IEEE.