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dc.contributor.author반효경*
dc.date.accessioned2016-08-28T11:08:35Z-
dc.date.available2016-08-28T11:08:35Z-
dc.date.issued2011*
dc.identifier.isbn9780769545769*
dc.identifier.issn1521-9097*
dc.identifier.otherOAK-13702*
dc.identifier.urihttps://dspace.ewha.ac.kr/handle/2015.oak/229659-
dc.description.abstractRecently, PCM (phase change memory) emerges as a new storage media and there is a bright prospect that PCM will be used as a storage device in the near future. Since the optimistic access time of PCM is expected to be almost identical to that of DRAM, we can make a question that the traditional buffer cache will be still effective for high speed secondary storage such as PCM. This paper answers it by showing that the buffer cache is still effective in such environments due to the software overhead and the bimodal block reference characteristics. Based on this observation, we present a new buffer cache management scheme appropriately for the system where the speed gap between the cache and storage is small. To this end, we analyze the condition that caching gains and find the characteristics of I/O traces that can be exploited in managing buffer cache for PCM-storage. © 2011 IEEE.*
dc.description.sponsorshipNational Cheng Kung University;National Science Council;Ministry of Education;Academia Sinica;National Center for High Performance Computing*
dc.languageEnglish*
dc.titleIs buffer cache still effective for high speed PCM (phase change memory) storage?*
dc.typeConference Paper*
dc.relation.indexSCOPUS*
dc.relation.startpage356*
dc.relation.lastpage363*
dc.relation.journaltitleProceedings of the International Conference on Parallel and Distributed Systems - ICPADS*
dc.identifier.doi10.1109/ICPADS.2011.74*
dc.identifier.scopusid2-s2.0-84856592055*
dc.author.googleLee E.*
dc.author.googleJin D.*
dc.author.googleKoh K.*
dc.author.googleBahn H.*
dc.contributor.scopusid반효경(7003994561)*
dc.date.modifydate20240315133816*
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인공지능대학 > 컴퓨터공학과 > Journal papers
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