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Macro model and sense amplifier for a MRAM

Title
Macro model and sense amplifier for a MRAM
Authors
Kim J.-H.Lee J.-W.Lee S.-J.Shin H.
Ewha Authors
신형순
SCOPUS Author ID
신형순scopus
Issue Date
2002
Journal Title
Journal of the Korean Physical Society
ISSN
0374-4884JCR Link
Citation
vol. 41, no. 6, pp. 896 - 901
Indexed
SCI; SCIE; SCOPUS; KCI WOS scopus
Abstract
For the simulation of the architecture for a magnetoresistive random access memory (MRAM) based on GMR (giant magnetoresistance) and a MTJ (magnetic tunnel junction) cell having a hysteretic characteristics, a macro model showing this hysteresis is required. Also, a new sense amplifier is needed for the MRAM because the cell is destroyed at high voltages. Thus, this work presents a macro model and a sensing circuit for a MRAM. The macro model is realized by using a six-terminal subcircuit, which emulates the hysteretic nature of MRAM cell, and read/write simulations are possible. A current-source bit-line-clamped sense amplifier maintains a low voltage on the bit line during the full VDD sensing, so it is suitable for sensing the MRAM cell.
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엘텍공과대학 > 전자공학과 > Journal papers
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