View : 111 Download: 0

Analysis of Threshold Voltage Variation Due to the Quantum Effects in MOSFETs

Title
Analysis of Threshold Voltage Variation Due to the Quantum Effects in MOSFETs
Authors
이지은
Issue Date
2004
Department/Major
과학기술대학원 정보통신학과
Publisher
梨花女子大學校 科學技術大學院
Degree
Master
Advisors
신형순
Abstract
MOS 소자의 크기는 VLSI 집적도가 향상됨에 따라 지속적으로 감소하면서 gate length(L_(g))를 줄이게 되고 현재 L_(g)는 sub-100㎚ 영역으로 scaling 되고 있다. L_(g)가 감소함에 따라 증가하는 SCE를 최소화시키기 위하여 T_(ox)를 줄이고 기판의 doping을 증가시키고 있다. Oxide 두께를 줄이면 Si/SiO₂ interface에서 vertical electric field가 증가하게 되며 급격한 potential의 변화에 따라 quantum well이 형성되게 된다. 본 논문에서는 양자 효과의 특성을 분석하기 위해 Poisson 방정식과 Schrodinger 방정식을 동시에 고려하는 상보적 방법을 사용하여 소자의 특성을 분석한다. 이러한 방법을 사용하여 n^(+) poly, p^(+) poly를 사용하는 bulk NMOS, PMOS를 각각 분석하여 quantum effect가 C-V 그래프 및 소자의 특성에 어떠한 영향을 주는지 알아본다. 또한 double-gate MOSFET에서 문턱 전압의 aN_(a)lytical equation을 유도하여 aN_(a)lytical equation의 결과와 device simulation의 결과를 비교하여 정확도를 검증하고 T_(si), T_(ox), N_(a)를 변화시킴에 따른 Vth의 변화도 분석한다. 그리고 DG MOSFET에서 quantum effect가 소자 특성에 미치는 영향을 분석한다.;As MOS scaling down sub-100㎚, the conventioN_(a)l MOSFET shows short-channel effect (SCE). To minimize the SCE, oxide thickness should be reduced and substrate doping should be increased. These MOSFETs have very high vertical electric field at Si/SiO₂ interface and quantum effect is occurred. Therefore, we need a new method which calculates not only Poisson equation but Schrodinger equation for quantum mechanics. For effective control of SCE, double-gate(DG) MOSFET that has very thin silicon film is widely studying. There are two types of DG MOSFET : symmetric and asymmetric. A device both gates have the same gate type is symmetric DG MOSFET. Another device, one gate uses n^(+) poly and the other gate uses p^(+) poly, is asymmetric DG MOSFET. In this thesis, quantum effect in bulk-MOSFETs which has n^(+) poly, p^(+) poly with n-type substrate or p-type substrate are aN_(a)lyzed. We derived an aN_(a)lytical V_(th) equation for the DG MOSFET and the model is compared with the simulation results. V_(th) of symmetric and asymmetric DG MOSFETs with various T_(si), N_(a) and Tox is also aN_(a)lyzed. It is found that, in comparison to the asymmetric DG MOSFET, the variation of V_(th) due to the variation of device structure such as T_(si), Tox and N_(a) is much smaller in symmetric DG MOSFET. Therefore, symmetric DG MOSFET is superior to asymmetric DG MOSFET in the process control point of view. However a symmetric DG MOSFET with n^(+)polysilicon has negative V_(th). Therefore, for proper V_(th) in symmetric DG, metal gate with appropriate work-function is necessary.
Fulltext
Show the fulltext
Appears in Collections:
과학기술대학원 > 정보통신학과 > Theses_Master
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE