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DVD Player를 위한 후처리 블록에서의 메모리 최적화에 대한 연구

Title
DVD Player를 위한 후처리 블록에서의 메모리 최적화에 대한 연구
Other Titles
Hardware-Efficient Post Processing Algorithm for DVD Player
Authors
장선옥
Issue Date
2004
Department/Major
과학기술대학원 정보통신학과
Publisher
梨花女子大學校 科學技術 大學院
Degree
Master
Advisors
이승준
Abstract
Most DVD players contain 4 main functions : MPEG-2 video decoder, SPU(Sub-Picture Unit) decoder, post processor, and sound decoder. Post processor composes of size conversion, zooming the frame, and adjustment of image quality such as sharpness, contrast, hue and saturation. This thesis proposes a hardware-efficient post processing structure for a DVD player. In a naive implementation, SDRAMs exist among subblocks. The new structure proposed in this thesis removes these memories. It needs shift registers, instead. Using memories between each block, 2.415 Mbytes of memory is needed. And the number of clock cycles required to access one frame of data in sharpness block is 12096000cycles. It exceeds the maximum operating frequency of typical SDRAMs considering RAS, CAS and precharge delays. This paper presents a hardwareefficient structure to reduce the memory size and the number of clock cycles for memory access. With our proposed structure, memory size is decreased by 57%.
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과학기술대학원 > 정보통신학과 > Theses_Master
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